tm march 2009 FDS6675BZ p-channel powertrench ? mosfet ?2009 fairchild semiconductor corporation FDS6675BZ rev. b2 www.fairchildsemi.com 1 FDS6675BZ p-channel powertrench ? mosfet -30v, -11a, 13m ? general description this p-channel mosfet is producted using fairchild semiconductor?s advanced powertrench process that has been especially tailored to minimize the on-state resistance. this device is well suited for power management and load switching applications common in notebook computers and portable battery packs. features ? max r ds(on) = 13m ? at v gs = -10v, i d = -11a ? max r ds(on) = 21.8m ? at v gs = -4.5v, i d = -9a ? extended v gs range (-25v) for battery applications ? hbm esd protection level of 5.4 kv typical (note 3) ? high performance trench tec hnology for extremely low r ds(on) ? high power and current handing capability ? rohs compliant 1 7 5 2 8 4 6 3 s d s s so-8 d d d g mosfet maximum ratings t a = 25c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter ratings units v ds drain to source voltage -30 v v gs gate to source voltage 25 v i d drain current -continuous (note 1a) -11 a -pulsed -55 p d power dissipation for single operation (note 1a) 2.5 w (note 1b) 1.2 (note 1c) 1.0 t j , t stg operating and storage temperature -55 to 150 c r ja thermal resistance , junction to ambient (note 1a) 50 c/w r jc thermal resistance , junction to case (note 1) 25 c/w device marking device reel size tape width quantity FDS6675BZ FDS6675BZ 13?? 12mm 2500 units
FDS6675BZ p-channel powertrench ? mosfet www.fairchildsemi.com 2 ?2009 fairchild semiconductor corporation FDS6675BZ rev b2 electrical characteristics t j = 25c unless otherwise noted symbol parameter test conditions min typ max units off characteristics b vdss drain to source breakdown voltage i d = -250 p a, v gs = 0v -30 v ' b vdss ' t j breakdown voltage temperature coefficient i d = -250 p a, referenced to 25 c -20 mv / c i dss zero gate voltage drain current v ds = -24v, v gs = 0v -1 p a i gss gate to source leakage current v gs = 25v, v ds = 0v 10 p a on characteristics v gs(th) gate to source threshold voltage v gs = v ds , i d = -250 p a -1 -2 -3 v ' v gs(th) ' t j gate to source threshold voltage temperature coefficient i d = -250 p a, referenced to 25 c 15.7 mv/ c r ds(on) drain to source on resistance v gs = -10v , i d = -11a 10.8 13.0 m : v gs = -4.5v, i d = -9a 17.4 21.8 v gs = -10v, i d = -11a t j = 125 o c 15.0 18.8 g fs forward transconductance v ds = -5v, i d = -11a 34 s (note 2) dynamic characteristics c iss input capacitance v ds = -15v, v gs = 0v, f = 1mhz 1855 2470 pf c oss output capacitance 335 450 pf c rss reverse transfer capacitance 330 500 pf switching characteristics (note 2) t d(on) turn-on delay time v dd = -15v, i d = -11a v gs = -10v, r gs = 6 : 3.0 10 ns t r rise time 7.8 16 ns t d(off) turn-off delay time 120 200 ns t f fall time 60 100 ns q g total gate charge v ds = -15v, v gs = -10v, i d = -11a 44 62 nc q g total gate charge v ds = -15v, v gs = -5v, i d = -11a 25 35 nc q gs gate to source gate charge 7.2 nc q gd gate to drain charge 11.4 nc drain-source diode characteristics v sd source to drain diode forward voltage v gs = 0v, i s = -2.1a -0.7 -1.2 v t rr reverse recovery time i f = -11a, di/dt = 100a/ p s 42 ns q rr reverse recovery charge i f = -11a, di/dt = 100a/ p s 30 nc notes: 1: r t ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the s older mounting surface of the drain pins. r t jc is guaranteed by design while r t ca is determined by the user?s board design. scale 1 : 1 on letter size paper 2: pulse test:pulse width <300 us, duty cycle < 2.0% 3: the diode connected between the gate and source serves only as protection against esd. no gate overvoltage rating is implied. a) 50 c/w when mounted on a 1 in 2 pad of 2 oz copper minimun pad c) 125 c/w when mounted on a b)105 c/w when mounted on a .04 in 2 pad of 2 oz copper
FDS6675BZ p-channel powertrench ? mosfet www.fairchildsemi.com 3 ?2009 fairchild semiconductor corporation FDS6675BZ rev b2 typical characteristics t j = 25c unless otherwise noted figure 1. on region characteristics 01234 0 10 20 30 40 50 60 pulse duration = 80 p s duty cycle = 0.5%max v gs = - 5v v gs = - 4v v gs = - 3v v gs = - 3.5v v gs = - 4.5v v gs = - 10v -i d , drain current (a) -v ds , drain to source voltage (v) figure 2. normalized 0 102030405060 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 pulse duration = 80 p s duty cycle = 0.5%max normalized drain to source on-resistance -i d , drain current(a) v gs = - 10v v gs = - 5v v gs = - 4.5v v gs = - 4v v gs = - 3.5v on-resistance vs drain current and gate voltage figure 3. -80 -40 0 40 80 120 160 0.6 0.8 1.0 1.2 1.4 1.6 i d = -11a v gs = -10v normalized drain to source on-resistance t j , junction temperature ( o c ) normalized on resistance vs junction temperature figure 4. 3.0 4.5 6.0 7.5 9.0 0 10 20 30 40 50 pulse duration = 80 p s duty cycle = 0.5%max t j = 150 o c t j = 25 o c i d = -11a r ds(on) , drain to source on-resistance ( m : ) -v gs , gate to source voltage (v) 10 on-resistance vs gate to source voltage figure 5. transfer characteristics 2.0 2.5 3.0 3.5 4.0 4.5 0 10 20 30 40 50 60 pulse duration = 80 p s duty cycle = 0.5%max t j = -55 o c t j = 25 o c t j = 150 o c -i d , drain current (a) -v gs , gate to source voltage (v) figure 6. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1e-3 0.01 0.1 1 10 100 t j = -55 o c t j = 25 o c t j = 150 o c v gs = 0v -i s , reverse drain current (a) -v sd , body diode forward voltage (v) source to drain diode forward voltage vs source current
FDS6675BZ p-channel powertrench ? mosfet www.fairchildsemi.com 4 ?2009 fairchild semiconductor corporation FDS6675BZ rev b2 figure 7. 0 1020304050 0 2 4 6 8 10 v dd = -20v v dd = -10v -v gs , gate to source voltage(v) q g , gate charge(nc) v dd = -15v gate charge characteristics figure 8. 0.1 1 10 100 1000 f = 1mhz v gs = 0v capacitance (pf) -v ds , drain to source voltage (v) c rss c oss c iss 4000 30 capacitance vs drain to source voltage figure 9. 0 5 10 15 20 25 30 35 1e-4 1e-3 0.01 0.1 1 10 100 1000 t j = 150 o c t j = 25 o c -i g (ua) -v gs (v) i g vs v gs figure 10. 10 -2 10 -1 10 0 10 1 10 2 1 10 t j = 25 o c t j = 125 o c -i as , avalanche current ( a ) 20 t av , time in avalanche(ms) unclamped inductive switching capability figure 11. 25 50 75 100 125 150 0 2 4 6 8 10 12 v gs = -10v v gs = -4.5v -i d , drain current (a) t a , ambient temperature ( o c ) maximum continuous drain current vs ambient temperature figure 12. 0.01 0.1 1 10 100 0.01 0.1 1 10 100 1 ms 1 s 10 s dc 100 ms 10 ms 100 us i d , drain current (a) v ds , drain to source voltage (v) this area is limited by r ds(on) single pulse t j = max rated r t ja = 125 o c/w t a = 25 o c 200 forward bias safe operating area typical characteristics t j = 25c unless otherwise noted
FDS6675BZ p-channel powertrench ? mosfet www.fairchildsemi.com 5 ?2009 fairchild semiconductor corporation FDS6675BZ rev b2 figure 13. single pulse maximum power dissipation 10 -4 10 -3 10 -2 10 -1 11010 2 10 3 0.5 1 10 10 2 10 3 10 4 single pulse r t ja = 125 o c/w t a = 25 o c v gs = -10 v p ( pk ) , peak transient power (w) t, pulse width (sec) figure 14. 10 -4 10 -3 10 -2 10 -1 11010 2 10 3 10 -4 10 -3 10 -2 10 -1 1 single pulse r t ja = 125 o c/w duty cycle-descending order normalized thermal impedance, z t ja t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 2 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z t ja x r t ja + t a junction-to-ambient transient thermal response curve typical characteristics t j = 25c unless otherwise noted
www.fairchildsemi.com 6 FDS6675BZ p-channel powertrench ? mosfet ?2009 fairchild semiconductor corporation FDS6675BZ rev . b2 rev. i39 trademarks the following includes registered and unregistered trademarks and service marks, owned by fairchild semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive list of all such trademarks. *trademarks of system general corporati on, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes wi thout further notice to any products herein to improve reliability, function, or desi gn. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fai rchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms build it now? 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